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authorJarkko Nikula <jarkko.nikula@linux.intel.com>2018-11-01 16:36:36 +0200
committerMark Brown <broonie@kernel.org>2018-11-05 11:50:51 +0000
commitb53548f9d9e4ca9203095afe2fadc97c982d50ee (patch)
tree5cab5a19457d011a7cf7deb66c90e08f969304b8 /Documentation/devicetree/bindings/spi/spi-mt65xx.txt
parentspi: rockchip: support lsb-first mode (diff)
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spi: pxa2xx: Remove LPSS private register restoring during resume
Intel LPSS private register restoring in spi-pxa2xx.c: pxa2xx_spi_resume() was added before there was no any other code restoring them. This was changed after following commits for previous and current LPSS platforms: c78b0830667a ("ACPI / LPSS: custom power domain for LPSS") 41a3da2b8e16 ("mfd: intel-lpss: Save register context on suspend") However there is one caveat: There is no LPSS private register context save/restore for the Intel Lynxpoint in the Linux kernel code. I did some debugging on one Lynxpoint based device I have and on it the LPSS register context is not lost over suspend/resume cycle (s2idle). Which happens for instance on Intel Braswell. I'm speculating but I guess either firmware does it or the LPSS is kept always on Lynxpoint. Given that we haven't needed to implement Lynxpoint LPSS I2C or UART private register context save/restore over four years time I think we are safe to remove this LPSS private register restoring during resume here. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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