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author | Arnaldo Carvalho de Melo <acme@redhat.com> | 2019-11-26 11:06:19 -0300 |
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committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2019-11-26 11:06:19 -0300 |
commit | 2ea352d5960ad469f5712cf3e293db97beac4e01 (patch) | |
tree | c24ae19073f2884867b310ee193d36a82075b60f /Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml | |
parent | Merge branch 'x86/core' into perf/core, to resolve conflicts and to pick up completed topic tree (diff) | |
parent | Merge tag 'for-linus-5.5-1' of git://github.com/cminyard/linux-ipmi (diff) | |
download | linux-dev-2ea352d5960ad469f5712cf3e293db97beac4e01.tar.xz linux-dev-2ea352d5960ad469f5712cf3e293db97beac4e01.zip |
Merge remote-tracking branch 'torvalds/master' into perf/core
To pick up BPF changes we'll need.
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml | 83 |
1 files changed, 83 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml new file mode 100644 index 000000000000..3665a5fe6b7f --- /dev/null +++ b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/st,stm32-qspi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 Quad Serial Peripheral Interface (QSPI) bindings + +maintainers: + - Christophe Kerello <christophe.kerello@st.com> + - Patrice Chotard <patrice.chotard@st.com> + +allOf: + - $ref: "spi-controller.yaml#" + +properties: + compatible: + const: st,stm32f469-qspi + + reg: + items: + - description: registers + - description: memory mapping + + reg-names: + items: + - const: qspi + - const: qspi_mm + + clocks: + maxItems: 1 + + interrupts: + maxItems: 1 + + resets: + maxItems: 1 + + dmas: + items: + - description: tx DMA channel + - description: rx DMA channel + + dma-names: + items: + - const: tx + - const: rx + +required: + - compatible + - reg + - reg-names + - clocks + - interrupts + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/stm32mp1-clks.h> + #include <dt-bindings/reset/stm32mp1-resets.h> + spi@58003000 { + compatible = "st,stm32f469-qspi"; + reg = <0x58003000 0x1000>, <0x70000000 0x10000000>; + reg-names = "qspi", "qspi_mm"; + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&mdma1 22 0x10 0x100002 0x0 0x0>, + <&mdma1 22 0x10 0x100008 0x0 0x0>; + dma-names = "tx", "rx"; + clocks = <&rcc QSPI_K>; + resets = <&rcc QSPI_R>; + + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-rx-bus-width = <4>; + spi-max-frequency = <108000000>; + }; + }; + +... |