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| author |   Andi Shyti <andi.shyti@samsung.com> | 2016-07-12 19:02:10 +0900 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2016-07-14 17:28:11 +0100 |
| commit | c068042bf0872c9121f4a6eab281dd63f61df5d3 (patch) | |
| tree | 472a6213b61f433ece2a45f0d3bec4a43841ce57 /Documentation/devicetree/bindings/spi | |
| parent | spi: s3c64xx: fix reference leak to master in s3c64xx_spi_remove() (diff) | |
| download | linux-dev-c068042bf0872c9121f4a6eab281dd63f61df5d3.tar.xz linux-dev-c068042bf0872c9121f4a6eab281dd63f61df5d3.zip | |
spi: s3c64xx: add exynos5433 spi compatible
The samsung,exynos5433-spi has some peculiarities that bring the
need of creating a new compatible in the binding.
One of those is the 3-clocks controller management where the spi
is fed with three clocks: "spi", "busclkN" and "ioclk".
By adding the exynos5433-spi, we deprecate the exynos7 compatible
and discourage its use.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Reviewed-by: Michael Turquette <mturquette@baylibre.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/spi')
| -rw-r--r-- | Documentation/devicetree/bindings/spi/spi-samsung.txt | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-samsung.txt b/Documentation/devicetree/bindings/spi/spi-samsung.txt index 930bc7349271..ab4f0a46e859 100644 --- a/Documentation/devicetree/bindings/spi/spi-samsung.txt +++ b/Documentation/devicetree/bindings/spi/spi-samsung.txt @@ -9,7 +9,8 @@ Required SoC Specific Properties: - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms - samsung,s3c6410-spi: for s3c6410 platforms - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms - - samsung,exynos7-spi: for exynos7 platforms + - samsung,exynos5433-spi: for exynos5433 compatible controllers + - samsung,exynos7-spi: for exynos7 platforms <DEPRECATED> - reg: physical base address of the controller and length of memory mapped region. |