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authorKrzysztof Kozlowski <krzk@kernel.org>2019-10-21 18:13:45 +0200
committerRob Herring <robh@kernel.org>2019-10-28 19:40:41 -0500
commitf69629919942a0dd3bb8c3f2d8493056c18ec9e2 (patch)
tree781ca4c92b51d0d3272ca86bc0b986dac4b78488 /Documentation/devicetree/bindings/sram/sram.yaml
parentMerge branch 'dt/linus' into dt/next (diff)
downloadlinux-dev-f69629919942a0dd3bb8c3f2d8493056c18ec9e2.tar.xz
linux-dev-f69629919942a0dd3bb8c3f2d8493056c18ec9e2.zip
dt-bindings: sram: Convert SRAM bindings to json-schema
Convert generic mmio-sram bindings to DT schema format using json-schema. Require the address/size cells to be 1, not equal to root node. This also fixes the check for clocks property to be in main root node instead of children. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org>
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+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sram/sram.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Generic on-chip SRAM
+
+maintainers:
+ - Rob Herring <robh@kernel.org>
+
+description: |+
+ Simple IO memory regions to be managed by the genalloc API.
+
+ Each child of the sram node specifies a region of reserved memory. Each
+ child node should use a 'reg' property to specify a specific range of
+ reserved memory.
+
+ Following the generic-names recommended practice, node names should
+ reflect the purpose of the node. Unit address (@<address>) should be
+ appended to the name.
+
+properties:
+ $nodename:
+ pattern: "^sram(@.*)?"
+
+ compatible:
+ contains:
+ enum:
+ - mmio-sram
+ - atmel,sama5d2-securam
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ description:
+ A list of phandle and clock specifier pair that controls the single
+ SRAM clock.
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ ranges:
+ description:
+ Should translate from local addresses within the sram to bus addresses.
+
+ no-memory-wc:
+ description:
+ The flag indicating, that SRAM memory region has not to be remapped
+ as write combining. WC is used by default.
+ type: boolean
+
+patternProperties:
+ "^([a-z]*-)?sram@[a-f0-9]+$":
+ type: object
+ description:
+ Each child of the sram node specifies a region of reserved memory.
+ properties:
+ compatible:
+ description:
+ Should contain a vendor specific string in the form
+ <vendor>,[<device>-]<usage>
+
+ reg:
+ description:
+ IO mem address range, relative to the SRAM range.
+ maxItems: 1
+
+ pool:
+ description:
+ Indicates that the particular reserved SRAM area is addressable
+ and in use by another device or devices.
+ type: boolean
+
+ export:
+ description:
+ Indicates that the reserved SRAM area may be accessed outside
+ of the kernel, e.g. by bootloader or userspace.
+ type: boolean
+
+ protect-exec:
+ description: |
+ Same as 'pool' above but with the additional constraint that code
+ will be run from the region and that the memory is maintained as
+ read-only, executable during code execution. NOTE: This region must
+ be page aligned on start and end in order to properly allow
+ manipulation of the page attributes.
+ type: boolean
+
+ label:
+ description:
+ The name for the reserved partition, if omitted, the label is taken
+ from the node name excluding the unit address.
+
+ required:
+ - reg
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+
+additionalProperties: false
+
+examples:
+ - |
+ sram@5c000000 {
+ compatible = "mmio-sram";
+ reg = <0x5c000000 0x40000>; /* 256 KiB SRAM at address 0x5c000000 */
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x5c000000 0x40000>;
+
+ smp-sram@100 {
+ reg = <0x100 0x50>;
+ };
+
+ device-sram@1000 {
+ reg = <0x1000 0x1000>;
+ pool;
+ };
+
+ exported-sram@20000 {
+ reg = <0x20000 0x20000>;
+ export;
+ };
+ };