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| author |   William Wu <william.wu@rock-chips.com> | 2017-04-19 20:11:38 +0800 |
|---|---|---|
| committer |   Felipe Balbi <felipe.balbi@linux.intel.com> | 2017-05-17 14:16:57 +0300 |
| commit | 65db7a0c9816370da5303500c7ba3754fa430720 (patch) | |
| tree | 7da7f0d3a114bc937d06ab1207f3b6bbb0576ca2 /Documentation/devicetree/bindings/usb/dwc3.txt | |
| parent | usb: gadget: udc: add null check before pointer dereference (diff) | |
| download | linux-dev-65db7a0c9816370da5303500c7ba3754fa430720.tar.xz linux-dev-65db7a0c9816370da5303500c7ba3754fa430720.zip | |
usb: dwc3: add disable u2mac linestate check quirk
This patch adds a quirk to disable USB 2.0 MAC linestate check
during HS transmit. Refer the dwc3 databook, we can use it for
some special platforms if the linestate not reflect the expected
line state(J) during transmission.
When use this quirk, the controller implements a fixed 40-bit
TxEndDelay after the packet is given on UTMI and ignores the
linestate during the transmit of a token (during token-to-token
and token-to-data IPGAP).
On some rockchip platforms (e.g. rk3399), it requires to disable
the u2mac linestate check to decrease the SSPLIT token to SETUP
token inter-packet delay from 566ns to 466ns, and fix the issue
that FS/LS devices not recognized if inserted through USB 3.0 HUB.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'Documentation/devicetree/bindings/usb/dwc3.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/usb/dwc3.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index f658f394c2d3..52fb41046b34 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -45,6 +45,8 @@ Optional properties: a free-running PHY clock. - snps,dis-del-phy-power-chg-quirk: when set core will change PHY power from P0 to P1/P2/P3 without delay. + - snps,dis-tx-ipgap-linecheck-quirk: when set, disable u2mac linestate check + during HS transmit. - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal utmi_l1_suspend_n, false when asserts utmi_sleep_n - snps,hird-threshold: HIRD threshold |