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| author |   Anson Huang <Anson.Huang@nxp.com> | 2019-08-28 09:35:00 -0400 |
|---|---|---|
| committer |   Wim Van Sebroeck <wim@linux-watchdog.org> | 2019-09-17 08:59:12 +0200 |
| commit | 69eb8b118631e5a6741edc90aac6d9139a43e9ec (patch) | |
| tree | 5c33006a8418e64252c19d28492f0189b1e4a856 /Documentation/devicetree/bindings/watchdog | |
| parent | dt-bindings: watchdog: sun4i: Add the watchdog clock (diff) | |
| download | linux-dev-69eb8b118631e5a6741edc90aac6d9139a43e9ec.tar.xz linux-dev-69eb8b118631e5a6741edc90aac6d9139a43e9ec.zip | |
dt-bindings: watchdog: Add i.MX7ULP bindings
Add the watchdog bindings for Freescale i.MX7ULP.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <rohb@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/1566999303-18795-1-git-send-email-Anson.Huang@nxp.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Diffstat (limited to 'Documentation/devicetree/bindings/watchdog')
| -rw-r--r-- | Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.txt | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.txt b/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.txt new file mode 100644 index 000000000000..f902508d6cac --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.txt @@ -0,0 +1,22 @@ +* Freescale i.MX7ULP Watchdog Timer (WDT) Controller + +Required properties: +- compatible : Should be "fsl,imx7ulp-wdt" +- reg : Should contain WDT registers location and length +- interrupts : Should contain WDT interrupt +- clocks: Should contain a phandle pointing to the gated peripheral clock. + +Optional properties: +- timeout-sec : Contains the watchdog timeout in seconds + +Examples: + +wdog1: watchdog@403d0000 { + compatible = "fsl,imx7ulp-wdt"; + reg = <0x403d0000 0x10000>; + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pcc2 IMX7ULP_CLK_WDG1>; + assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>; + assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>; + timeout-sec = <40>; +}; |