|author||Andrei.Stefanescu@microchip.com <Andrei.Stefanescu@microchip.com>||2018-12-12 11:57:11 +0000|
|committer||Linus Walleij <email@example.com>||2018-12-21 10:54:33 +0100|
|parent||gpio/mmc/of: Respect polarity in the device tree (diff)|
dt-bindings: arm: atmel: describe SECUMOD usage as a GPIO controller
This patch describes the Security Module's usage as a GPIO controller for its PIOBU pins. These pins have the special property of maintaining their voltage during suspend-to-mem. Signed-off-by: Andrei Stefanescu <firstname.lastname@example.org> Reviewed-by: Rob Herring <email@example.com> Signed-off-by: Linus Walleij <firstname.lastname@example.org>
Diffstat (limited to 'Documentation/devicetree/bindings')
1 files changed, 11 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index 4b96608ad692..14f319f694b7 100644
@@ -158,14 +158,24 @@ Security Module (SECUMOD)
The Security Module macrocell provides all necessary secure functions to avoid
voltage, temperature, frequency and mechanical attacks on the chip. It also
-embeds secure memories that can be scrambled
+embeds secure memories that can be scrambled.
+The Security Module also offers the PIOBU pins which can be used as GPIO pins.
+Note that they maintain their voltage during Backup/Self-refresh.
- compatible: Should be "atmel,<chip>-secumod", "syscon".
<chip> can be "sama5d2".
- reg: Should contain registers location and length
+- gpio-controller: Marks the port as GPIO controller.
+- #gpio-cells: There are 2. The pin number is the
+ first, the second represents additional
+ parameters such as GPIO_ACTIVE_HIGH/LOW.
compatible = "atmel,sama5d2-secumod", "syscon";
reg = <0xfc040000 0x100>;
+ #gpio-cells = <2>;