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| author |   Chen-Yu Tsai <wens@csie.org> | 2019-12-15 17:59:15 +0100 |
|---|---|---|
| committer |   Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2020-01-04 08:19:01 +0100 |
| commit | 249b286171fa9c358e8d5c825b48c4ebea97c498 (patch) | |
| tree | 0fb7af1c1bb200f8161805a0bbf9cbd6d630bf8e /Documentation/devicetree | |
| parent | media: sun4i-csi: Fix [HV]sync polarity handling (diff) | |
| download | linux-dev-249b286171fa9c358e8d5c825b48c4ebea97c498.tar.xz linux-dev-249b286171fa9c358e8d5c825b48c4ebea97c498.zip | |
media: sun4i-csi: Deal with DRAM offset
On Allwinner SoCs, some high memory bandwidth devices do DMA directly
over the memory bus (called MBUS), instead of the system bus. These
devices include the CSI camera sensor interface, video (codec) engine,
display subsystem, etc.. The memory bus has a different addressing
scheme without the DRAM starting offset.
Deal with this using the "interconnects" property from the device tree,
or if that is not available, set dev->dma_pfn_offset to PHYS_PFN_OFFSET.
Fixes: 577bbf23b758 ("media: sunxi: Add A10 CSI driver")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'Documentation/devicetree')
0 files changed, 0 insertions, 0 deletions