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authorRay Jui <ray.jui@broadcom.com>2016-07-18 10:20:17 -0700
committerLinus Walleij <linus.walleij@linaro.org>2016-07-22 16:45:04 +0200
commit418af4a88ed41cd38aa817b585b857b8bd5f7fd9 (patch)
treef9b44fafbbc7b2180bbd9a08d720cc581e177a54 /Documentation/devicetree
parentpinctrl: bcm: add OF dependencies (diff)
downloadlinux-dev-418af4a88ed41cd38aa817b585b857b8bd5f7fd9.tar.xz
linux-dev-418af4a88ed41cd38aa817b585b857b8bd5f7fd9.zip
pinctrl: Update iProc GPIO DT bindings
Update the iProc GPIO binding document to add new compatible strings "brcm,iproc-nsp-gpio" and "brcm,iproc-stingray-gpio" to support the iProc based GPIO controller used in the NSP and Stingray SoCs, respectively Signed-off-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/pinctrl/brcm,iproc-gpio.txt18
1 files changed, 16 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,iproc-gpio.txt b/Documentation/devicetree/bindings/pinctrl/brcm,iproc-gpio.txt
index e4277921f3e3..a73cbeb0f309 100644
--- a/Documentation/devicetree/bindings/pinctrl/brcm,iproc-gpio.txt
+++ b/Documentation/devicetree/bindings/pinctrl/brcm,iproc-gpio.txt
@@ -3,8 +3,22 @@ Broadcom iProc GPIO/PINCONF Controller
Required properties:
- compatible:
- Must be "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio",
- "brcm,cygnus-crmu-gpio" or "brcm,iproc-gpio"
+ "brcm,iproc-gpio" for the generic iProc based GPIO controller IP that
+ supports full-featured pinctrl and GPIO functions used in various iProc
+ based SoCs
+
+ May contain an SoC-specific compatibility string to accommodate any
+ SoC-specific features
+
+ "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
+ "brcm,cygnus-crmu-gpio" for Cygnus SoCs
+
+ "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support
+ disabled
+
+ "brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general
+ pinctrl support completely disabled in this IP block. In Stingray, a
+ different IP block is used to handle pinctrl related functions
- reg:
Define the base and range of the I/O address space that contains SoC