aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree
diff options
context:
space:
mode:
authorStephen Boyd <sboyd@kernel.org>2020-01-21 16:14:48 -0800
committerStephen Boyd <sboyd@kernel.org>2020-01-21 16:14:48 -0800
commit498e165274f3296246bf5fd2dfa0d55b623866c1 (patch)
tree660969ecc0c4bcbeb07dfcc14ef40dead444b576 /Documentation/devicetree
parentLinux 5.5-rc1 (diff)
parentclk: imx: Add support for i.MX8MP clock driver (diff)
downloadlinux-dev-498e165274f3296246bf5fd2dfa0d55b623866c1.tar.xz
linux-dev-498e165274f3296246bf5fd2dfa0d55b623866c1.zip
Merge tag 'imx-clk-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-imx
Pull i.MX clk driver updates from Shawn Guo: - A series from Abel Vesa to do some trivial cleanups which will be helpful for i.MX clock driver switching to clk_hw based API - A series from Anson Huang to add i.MX8MP clock driver support - Disable non-functional divider between pll4_audio_div and pll4_post_div on imx6q - Fix watchdog2 clock name typo in imx7ulp clock driver - A couple of patches from Leonard Crestez to set CLK_GET_RATE_NOCACHE flag for DRAM related clocks on i.MX8M SoCs - Suppress bind attrs for i.MX8M clock driver to avoid the possibility of reloading the driver at runtime - Add a big comment in imx8qxp-lpcg driver to tell why devm_platform_ioremap_resource() shouldn't be used for the driver - A correction on i.MX8MN usb1_ctrl parent clock setting - A couple of trivial cleanup on clk-divider-gate driver - A series from Peng Fan to convert i.MX8M clock drivers to clk_hw based API * tag 'imx-clk-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (32 commits) clk: imx: Add support for i.MX8MP clock driver dt-bindings: imx: Add clock binding doc for i.MX8MP clk: imx: gate4: Switch imx_clk_gate4_flags() to clk_hw based API clk: imx: imx8mq: Switch to clk_hw based API clk: imx: imx8mm: Switch to clk_hw based API clk: imx: imx8mn: Switch to clk_hw based API clk: imx: Remove __init for imx_obtain_fixed_clk_hw() API clk: imx: gate3: Switch to clk_hw based API clk: imx: add hw API imx_clk_hw_mux2_flags clk: imx: add imx_unregister_hw_clocks clk: imx: clk-composite-8m: Switch to clk_hw based API clk: imx: clk-pll14xx: Switch to clk_hw based API clk: imx7up: Rename the clks to hws clk: imx: Rename the imx_clk_divider_gate to imply it's clk_hw based clk: imx: Rename the imx_clk_pfdv2 to imply it's clk_hw based clk: imx: Rename the imx_clk_pllv4 to imply it's clk_hw based clk: imx: Rename sccg and frac pll register to suggest clk_hw clk: imx: imx7ulp composite: Rename to show is clk_hw based clk: imx: pllv2: Switch to clk_hw based API clk: imx: pllv1: Switch to clk_hw based API ...
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/clock/imx8mp-clock.yaml68
1 files changed, 68 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/imx8mp-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mp-clock.yaml
new file mode 100644
index 000000000000..80278882cf57
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/imx8mp-clock.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/clock/imx8mp-clock.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX8M Plus Clock Control Module Binding
+
+maintainers:
+ - Anson Huang <Anson.Huang@nxp.com>
+
+description:
+ NXP i.MX8M Plus clock control module is an integrated clock controller, which
+ generates and supplies to all modules.
+
+properties:
+ compatible:
+ const: fsl,imx8mp-ccm
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: 32k osc
+ - description: 24m osc
+ - description: ext1 clock input
+ - description: ext2 clock input
+ - description: ext3 clock input
+ - description: ext4 clock input
+
+ clock-names:
+ items:
+ - const: osc_32k
+ - const: osc_24m
+ - const: clk_ext1
+ - const: clk_ext2
+ - const: clk_ext3
+ - const: clk_ext4
+
+ '#clock-cells':
+ const: 1
+ description:
+ The clock consumer should specify the desired clock by having the clock
+ ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mp-clock.h
+ for the full list of i.MX8M Plus clock IDs.
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - '#clock-cells'
+
+examples:
+ # Clock Control Module node:
+ - |
+ clk: clock-controller@30380000 {
+ compatible = "fsl,imx8mp-ccm";
+ reg = <0x30380000 0x10000>;
+ #clock-cells = <1>;
+ clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>,
+ <&clk_ext2>, <&clk_ext3>, <&clk_ext4>;
+ clock-names = "osc_32k", "osc_24m", "clk_ext1",
+ "clk_ext2", "clk_ext3", "clk_ext4";
+ };
+
+...