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authorDong Aisheng <aisheng.dong@nxp.com>2019-11-17 20:58:49 +0800
committerRob Herring <robh@kernel.org>2019-12-16 16:00:06 -0600
commit6a86e9f57a51f700ca775cb17114b9707a321e16 (patch)
treeca2b53c66130b22aa9d05b5281b090642234f99a /Documentation/devicetree
parentdt-bindings: mmc: fsl-imx-esdhc: add imx8qm compatible string (diff)
downloadlinux-dev-6a86e9f57a51f700ca775cb17114b9707a321e16.tar.xz
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dt-bindings: serial: lpuart: add imx8qm compatible string
Add imx8qm compatible string. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/serial/fsl-lpuart.txt2
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt
index f5f5ab0fd14e..c904e2e68332 100644
--- a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt
+++ b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt
@@ -10,6 +10,8 @@ Required properties:
on i.MX7ULP SoC with 32-bit little-endian register organization
- "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated
on i.MX8QXP SoC with 32-bit little-endian register organization
+ - "fsl,imx8qm-lpuart" for lpuart compatible with the one integrated
+ on i.MX8QM SoC with 32-bit little-endian register organization
- reg : Address and length of the register set for the device
- interrupts : Should contain uart interrupt
- clocks : phandle + clock specifier pairs, one for each entry in clock-names