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authorLinus Torvalds <torvalds@linux-foundation.org>2018-01-29 16:47:21 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2018-01-29 16:47:21 -0800
commit7bcd34259466413b477d85d12a48789b5e90e0f4 (patch)
treef6df4e6c4c0dfadebb15b90592fd2b3f845cff9b /Documentation/devicetree
parentMerge tag 'xtensa-20180129' of git://github.com/jcmvbkbc/linux-xtensa (diff)
parentirqdomain: Kill CONFIG_IRQ_DOMAIN_DEBUG (diff)
downloadlinux-dev-7bcd34259466413b477d85d12a48789b5e90e0f4.tar.xz
linux-dev-7bcd34259466413b477d85d12a48789b5e90e0f4.zip
Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner: "A rather small set of irq updates this time: - removal of the old and now obsolete irq domain debugging code - the new Goldfish PIC driver - the usual pile of small fixes and updates" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqdomain: Kill CONFIG_IRQ_DOMAIN_DEBUG irq/work: Improve the flag definitions irqchip/gic-v3: Fix the driver probe() fail due to disabled GICC entry irqchip/irq-goldfish-pic: Add Goldfish PIC driver dt-bindings/goldfish-pic: Add device tree binding for Goldfish PIC driver irqchip/ompic: fix return value check in ompic_of_init() dt-bindings/bcm283x: Define polarity of per-cpu interrupts irqchip/irq-bcm2836: Add support for DT interrupt polarity dt-bindings/bcm2836-l1-intc: Add interrupt polarity support
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt4
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt30
2 files changed, 32 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt
index f320dcd6e69b..8ced1696c325 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt
@@ -12,7 +12,7 @@ Required properties:
registers
- interrupt-controller: Identifies the node as an interrupt controller
- #interrupt-cells: Specifies the number of cells needed to encode an
- interrupt source. The value shall be 1
+ interrupt source. The value shall be 2
Please refer to interrupts.txt in this directory for details of the common
Interrupt Controllers bindings used by client devices.
@@ -32,6 +32,6 @@ local_intc: local_intc {
compatible = "brcm,bcm2836-l1-intc";
reg = <0x40000000 0x100>;
interrupt-controller;
- #interrupt-cells = <1>;
+ #interrupt-cells = <2>;
interrupt-parent = <&local_intc>;
};
diff --git a/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
new file mode 100644
index 000000000000..35f752706e7d
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
@@ -0,0 +1,30 @@
+Android Goldfish PIC
+
+Android Goldfish programmable interrupt device used by Android
+emulator.
+
+Required properties:
+
+- compatible : should contain "google,goldfish-pic"
+- reg : <registers mapping>
+- interrupts : <interrupt mapping>
+
+Example for mips when used in cascade mode:
+
+ cpuintc {
+ #interrupt-cells = <0x1>;
+ #address-cells = <0>;
+ interrupt-controller;
+ compatible = "mti,cpu-interrupt-controller";
+ };
+
+ interrupt-controller@1f000000 {
+ compatible = "google,goldfish-pic";
+ reg = <0x1f000000 0x1000>;
+
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <0x2>;
+ };