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authorMarc Zyngier <maz@kernel.org>2021-04-13 15:35:58 +0100
committerMarc Zyngier <maz@kernel.org>2021-04-13 15:35:58 +0100
commitad569b70aa02ffba1e86411b79570cbe4e6c7bb8 (patch)
treee7cb9d5b58e9421d7a5840fe97fcb2f740de216d /Documentation/virt
parentMerge branch 'kvm-arm64/memslot-fixes' into kvmarm-master/next (diff)
parentKVM: arm64: Fully zero the vcpu state on reset (diff)
downloadlinux-dev-ad569b70aa02ffba1e86411b79570cbe4e6c7bb8.tar.xz
linux-dev-ad569b70aa02ffba1e86411b79570cbe4e6c7bb8.zip
Merge branch 'kvm-arm64/misc-5.13' into kvmarm-master/next
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'Documentation/virt')
-rw-r--r--Documentation/virt/kvm/api.rst12
1 files changed, 12 insertions, 0 deletions
diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
index 62ffcb2dafee..b38f77bb74ae 100644
--- a/Documentation/virt/kvm/api.rst
+++ b/Documentation/virt/kvm/api.rst
@@ -3115,6 +3115,18 @@ optional features it should have.  This will cause a reset of the cpu
registers to their initial values.  If this is not called, KVM_RUN will
return ENOEXEC for that vcpu.
+The initial values are defined as:
+ - Processor state:
+ * AArch64: EL1h, D, A, I and F bits set. All other bits
+ are cleared.
+ * AArch32: SVC, A, I and F bits set. All other bits are
+ cleared.
+ - General Purpose registers, including PC and SP: set to 0
+ - FPSIMD/NEON registers: set to 0
+ - SVE registers: set to 0
+ - System registers: Reset to their architecturally defined
+ values as for a warm reset to EL1 (resp. SVC)
+
Note that because some registers reflect machine topology, all vcpus
should be created before this ioctl is invoked.