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authorJames Hogan <james.hogan@imgtec.com>2017-01-18 16:20:31 +0000
committerJames Hogan <james.hogan@imgtec.com>2017-02-03 15:21:31 +0000
commitbe67a0be94b65746dee63af5c184c78d00a707f6 (patch)
treef841a98be1a4a312fabe21e9cd49c6fb7a2fc3ad /Documentation/virtual
parentKVM: MIPS/T&E: Implement CP0_EBase register (diff)
downloadlinux-dev-be67a0be94b65746dee63af5c184c78d00a707f6.tar.xz
linux-dev-be67a0be94b65746dee63af5c184c78d00a707f6.zip
KVM: MIPS/T&E: Default to reset vector
Set the default VCPU state closer to the architectural reset state, with PC pointing at the reset vector (uncached PA 0x1fc00000, which for KVM T&E is VA 0x5fc00000), and with CP0_Status.BEV and CP0_Status.ERL to 1. Although QEMU at least will overwrite this state, it makes sense to do this now that CP0_EBase is properly implemented to check BEV, and now that we support a sparse GPA layout potentially with a boot ROM at GPA 0x1fc00000. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Radim Krčmář" <rkrcmar@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org
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