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authorWim Van Sebroeck <wim@iguana.be>2009-06-08 17:41:51 +0000
committerWim Van Sebroeck <wim@iguana.be>2009-06-18 07:31:58 +0000
commit55e8ddecec6a9dbe35a99d03cc4189fd7c56e600 (patch)
treeb0b13894e0054481601bc173f73facbc0c24fa23 /Documentation/watchdog/hpwdt.txt
parent[WATCHDOG] iTCO_wdt: fix memory corruption when RCBA is disabled by hardware (diff)
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[WATCHDOG] iTCO_wdt: Fix ICH7+ reboot issue.
Bugzilla: 9868 & 10195. There seems to be a bug into the SMM code that handles TCO Timeout SMI. Andriy Gapon found that the code on his DG33TL system does the following: > The handler is quite simple - it tests value in TCO1_CNT against 0x800, i.e. > checks TCO_TMR_HLT. If the bit is set the handler goes into an infinite loop, > apparently to allow the second timeout and reboot. Otherwise it simply clears > TIMEOUT bit in TCO1_STS and that's it. > So the logic seems to be reversed, because it is hard to see how TIMEOUT can > get set to 1 and SMI generated when TCO_TMR_HLT is set (other than a > transitional effect). The only trick we have is to bypass the SMM code by turning of the generation of the SMI#. The trick can only be enabled by setting the vendorsupport module parameter to 911. This trick doesn't work well on laptop's. Note: this is a dirty hack. Please handle with care. The only real fix is that the bug in the SMM bios code get's fixed. Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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