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| author |   Stefan Chulski <stefanc@marvell.com> | 2021-02-11 12:48:48 +0200 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2021-02-11 14:50:23 -0800 |
| commit | 1c2b4812b7daee6560d32c0d1c0963466f006942 (patch) | |
| tree | aeb3516402d90b45b784805b3a166d9acc513a4c /Documentation | |
| parent | xen/events: link interdomain events to associated xenbus device (diff) | |
| download | linux-dev-1c2b4812b7daee6560d32c0d1c0963466f006942.tar.xz linux-dev-1c2b4812b7daee6560d32c0d1c0963466f006942.zip | |
doc: marvell: add CM3 address space and PPv2.3 description
Patch adds CM3 address space and PPv2.3 description.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Acked-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/net/marvell-pp2.txt | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/net/marvell-pp2.txt b/Documentation/devicetree/bindings/net/marvell-pp2.txt index b78397669320..ce15c173f43f 100644 --- a/Documentation/devicetree/bindings/net/marvell-pp2.txt +++ b/Documentation/devicetree/bindings/net/marvell-pp2.txt @@ -1,5 +1,6 @@ * Marvell Armada 375 Ethernet Controller (PPv2.1) Marvell Armada 7K/8K Ethernet Controller (PPv2.2) + Marvell CN913X Ethernet Controller (PPv2.3) Required properties: @@ -12,10 +13,11 @@ Required properties: - common controller registers - LMS registers - one register area per Ethernet port - For "marvell,armada-7k-pp2", must contain the following register + For "marvell,armada-7k-pp2" used by 7K/8K and CN913X, must contain the following register sets: - packet processor registers - networking interfaces registers + - CM3 address space used for TX Flow Control - clocks: pointers to the reference clocks for this device, consequently: - main controller clock (for both armada-375-pp2 and armada-7k-pp2) @@ -81,7 +83,7 @@ Example for marvell,armada-7k-pp2: cpm_ethernet: ethernet@0 { compatible = "marvell,armada-7k-pp22"; - reg = <0x0 0x100000>, <0x129000 0xb000>; + reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>; clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>, <&cpm_syscon0 1 5>, <&cpm_syscon0 1 6>, <&cpm_syscon0 1 18>; clock-names = "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk"; |