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| author |   Gregory CLEMENT <gregory.clement@bootlin.com> | 2018-03-07 16:40:10 +0100 |
|---|---|---|
| committer |   Vinod Koul <vinod.koul@intel.com> | 2018-03-11 20:33:27 +0530 |
| commit | 3cd2c313f1d618f92d1294addc6c685c17065761 (patch) | |
| tree | 7b3fe40e8e3c1567412def410f4841d115d374fc /Documentation | |
| parent | dmaengine: rcar-dmac: fix max_chunk_size for R-Car Gen3 (diff) | |
| download | linux-dev-3cd2c313f1d618f92d1294addc6c685c17065761.tar.xz linux-dev-3cd2c313f1d618f92d1294addc6c685c17065761.zip | |
dmaengine: mv_xor_v2: Fix clock resource by adding a register clock
On the CP110 components which are present on the Armada 7K/8K SoC we need
to explicitly enable the clock for the registers. However it is not
needed for the AP8xx component, that's why this clock is optional.
With this patch both clock have now a name, but in order to be backward
compatible, the name of the first clock is not used. It allows to still
use this clock with a device tree using the old binding.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/dma/mv-xor-v2.txt | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/dma/mv-xor-v2.txt b/Documentation/devicetree/bindings/dma/mv-xor-v2.txt index 217a90eaabe7..9c38bbe7e6d7 100644 --- a/Documentation/devicetree/bindings/dma/mv-xor-v2.txt +++ b/Documentation/devicetree/bindings/dma/mv-xor-v2.txt @@ -11,7 +11,11 @@ Required properties: interrupts. Optional properties: -- clocks: Optional reference to the clock used by the XOR engine. +- clocks: Optional reference to the clocks used by the XOR engine. +- clock-names: mandatory if there is a second clock, in this case the + name must be "core" for the first clock and "reg" for the second + one + Example: |