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authorLinus Torvalds <torvalds@linux-foundation.org>2013-07-06 12:39:39 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2013-07-06 12:39:39 -0700
commit7644a448ccf200d95ad4426e84a486dec5cc1703 (patch)
tree2743ee79bd0b42b96c4c2d6f7194e2e2ccfc8572 /Documentation
parentMerge tag 'xenarm-for-3.11-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/sstabellini/xen (diff)
parentmetag: move EXPORT_SYMBOL(csum_partial) to metag_ksyms.c (diff)
downloadlinux-dev-7644a448ccf200d95ad4426e84a486dec5cc1703.tar.xz
linux-dev-7644a448ccf200d95ad4426e84a486dec5cc1703.zip
Merge tag 'metag-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/metag
Pull Metag architecture changes from James Hogan: - Infrastructure and DT files for TZ1090 SoC (pin control drivers already merged via pinctrl tree). - Panic on boot instead of just warning if cache aliasing possible. - Various SMP/hotplug fixes. - Various other randconfig/sparse fixes. * tag 'metag-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/metag: (24 commits) metag: move EXPORT_SYMBOL(csum_partial) to metag_ksyms.c metag: cpu hotplug: route_irq: preserve irq mask metag: kick: add missing irq_enter/exit to kick_handler() metag: smp: don't spin waiting for CPU to start metag: smp: enable irqs after set_cpu_online metag: use clear_tasks_mm_cpumask() metag: tz1090: select and instantiate pinctrl-tz1090-pdc metag: tz1090: select and instantiate pinctrl-tz1090 metag: don't check for cache aliasing on smp cpu boot metag: panic if cache aliasing possible metag: *.dts: include using preprocessor metag: add <dt-bindings/> symlink metag/.gitignore: Extend the *.dtb pattern to match the dtb.S files metag/traps: include setup.h for the per_cpu_trap_init declaration metag/traps: Mark die() as __noreturn to match the declaration. metag/processor.h: Add missing cpuinfo_op declaration. metag/setup: Restrict scope for the capabilities variable metag/mm/cache: Restrict scope for metag_lnkget_probe metag/asm/irq.h: Declare init_IRQ metag/kernel/irq.c: Declare root_domain as static ...
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/metag/meta.txt30
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.txt1
2 files changed, 31 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/metag/meta.txt b/Documentation/devicetree/bindings/metag/meta.txt
new file mode 100644
index 000000000000..f4457f57ab08
--- /dev/null
+++ b/Documentation/devicetree/bindings/metag/meta.txt
@@ -0,0 +1,30 @@
+* Meta Processor Binding
+
+This binding specifies what properties must be available in the device tree
+representation of a Meta Processor Core, which is the root node in the tree.
+
+Required properties:
+
+ - compatible: Specifies the compatibility list for the Meta processor.
+ The type shall be <string> and the value shall include "img,meta".
+
+Optional properties:
+
+ - clocks: Clock consumer specifiers as described in
+ Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+ - clock-names: Clock consumer names as described in
+ Documentation/devicetree/bindings/clock/clock-bindings.txt.
+
+Clocks are identified by name. Valid clocks are:
+
+ - "core": The Meta core clock from which the Meta timers are derived.
+
+* Examples
+
+/ {
+ compatible = "toumaz,tz1090", "img,meta";
+
+ clocks = <&meta_core_clk>;
+ clock-names = "core";
+};
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index db0457d61682..948f61561ffa 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -58,6 +58,7 @@ snps Synopsys, Inc.
st STMicroelectronics
ste ST-Ericsson
stericsson ST-Ericsson
+toumaz Toumaz
ti Texas Instruments
toshiba Toshiba Corporation
v3 V3 Semiconductor