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| author |   Vinod Koul <vinod.koul@intel.com> | 2017-11-14 10:37:07 +0530 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2017-11-14 10:37:07 +0530 |
| commit | d2045ba3a479ea630991354e1ca5aa98db35634e (patch) | |
| tree | 574b67db3779c1364151052c676f250b67ada7c5 /Documentation | |
| parent | Merge branch 'topic/sprd' into for-linus (diff) | |
| parent | dmaengine: sun6i: Retrieve channel count/max request from devicetree (diff) | |
| download | linux-dev-d2045ba3a479ea630991354e1ca5aa98db35634e.tar.xz linux-dev-d2045ba3a479ea630991354e1ca5aa98db35634e.zip | |
Merge branch 'topic/sun' into for-linus
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/dma/sun6i-dma.txt | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/sun6i-dma.txt b/Documentation/devicetree/bindings/dma/sun6i-dma.txt index 98fbe1a5c6dd..9700b1d00fed 100644 --- a/Documentation/devicetree/bindings/dma/sun6i-dma.txt +++ b/Documentation/devicetree/bindings/dma/sun6i-dma.txt @@ -27,6 +27,32 @@ Example: #dma-cells = <1>; }; +------------------------------------------------------------------------------ +For A64 DMA controller: + +Required properties: +- compatible: "allwinner,sun50i-a64-dma" +- dma-channels: Number of DMA channels supported by the controller. + Refer to Documentation/devicetree/bindings/dma/dma.txt +- all properties above, i.e. reg, interrupts, clocks, resets and #dma-cells + +Optional properties: +- dma-requests: Number of DMA request signals supported by the controller. + Refer to Documentation/devicetree/bindings/dma/dma.txt + +Example: + dma: dma-controller@1c02000 { + compatible = "allwinner,sun50i-a64-dma"; + reg = <0x01c02000 0x1000>; + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_DMA>; + dma-channels = <8>; + dma-requests = <27>; + resets = <&ccu RST_BUS_DMA>; + #dma-cells = <1>; + }; +------------------------------------------------------------------------------ + Clients: DMA clients connected to the A31 DMA controller must use the format |