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authorOlof Johansson <olof@lixom.net>2013-07-22 19:58:02 -0700
committerOlof Johansson <olof@lixom.net>2013-07-22 19:58:02 -0700
commitd757380c11018e7921324af094aee8dc979f223a (patch)
treec7387b0650839509933abb031e4dd9b869b0e2c9 /Documentation
parentMerge tag 'omap-for-v3.11/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes (diff)
parentARM: dts: imx51-babbage: Pass a real clock to the codec (diff)
downloadlinux-dev-d757380c11018e7921324af094aee8dc979f223a.tar.xz
linux-dev-d757380c11018e7921324af094aee8dc979f223a.zip
Merge tag 'imx-fixes-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes
From Shawn Guo, imx fixes for 3.11: - A few device tree source fixes regarding pinctrl, clock, and pwm backlight. - Fixes imx28 and imx51 audio driver failure caused by sgtl5000 codec driver change by supplying the correct clock for codec. - imx6q emi_sel clock muxing and imx6q-iomuxc-gpr macro fixes * tag 'imx-fixes-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: dts: imx51-babbage: Pass a real clock to the codec ARM i.MX53: mba53: Fix PWM backlight DT node ARM: imx: fix vf610 enet module clock selection ARM: mxs: saif0 is the clock provider to sgtl5000 ARM: i.MX6Q: correct emi_sel clock muxing ARM i.MX6Q: Fix IOMUXC GPR1 defines for ENET_CLK_SEL and IPU1/2_MUX ARM: i.MX27: Typo fix ARM: imx27: Fix documentation for SPLL clock ARM i.MX53: Fix UART pad configuration
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/clock/imx27-clock.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/imx27-clock.txt b/Documentation/devicetree/bindings/clock/imx27-clock.txt
index ab1a56e9de9d..7a2070393732 100644
--- a/Documentation/devicetree/bindings/clock/imx27-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx27-clock.txt
@@ -98,6 +98,7 @@ clocks and IDs.
fpm 83
mpll_osc_sel 84
mpll_sel 85
+ spll_gate 86
Examples: