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authorKefeng Wang <wangkefeng.wang@huawei.com>2019-06-22 11:45:57 +0800
committerRob Herring <robh@kernel.org>2019-07-09 16:50:50 -0600
commitf15d6358425af7976e146a07a47b75e4fe8ccd41 (patch)
treed2c389ad5fc93938ca2ed09a6df9ae552387facd /Documentation
parentdt-bindings: serial: add documentation for Rx in-band wakeup support (diff)
downloadlinux-dev-f15d6358425af7976e146a07a47b75e4fe8ccd41.tar.xz
linux-dev-f15d6358425af7976e146a07a47b75e4fe8ccd41.zip
dt-bindings: 83xx-512x-pci: Drop cell-index property
28eac2b74cc7 ("powerpc/fsl: Remove cell-index from PCI nodes"), and for now it is still not used, drop it from doc. Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/pci/83xx-512x-pci.txt1
1 files changed, 0 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pci/83xx-512x-pci.txt b/Documentation/devicetree/bindings/pci/83xx-512x-pci.txt
index b9165b72473c..3abeecf4983f 100644
--- a/Documentation/devicetree/bindings/pci/83xx-512x-pci.txt
+++ b/Documentation/devicetree/bindings/pci/83xx-512x-pci.txt
@@ -9,7 +9,6 @@ Freescale 83xx and 512x SOCs include the same PCI bridge core.
Example (MPC8313ERDB)
pci0: pci@e0008500 {
- cell-index = <1>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x0E -mini PCI */