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| author |   Vladimir Oltean <vladimir.oltean@nxp.com> | 2021-06-11 23:05:25 +0300 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2021-06-11 13:43:56 -0700 |
| commit | dd0721ea4c7a6c2ec8b309ff57d74d88f08d4c23 (patch) | |
| tree | 1b71de6869d88e0bd1ddfdebb0465ade16890b3b /MAINTAINERS | |
| parent | net: pcs: xpcs: also ignore phy id if it's all ones (diff) | |
| download | linux-dev-dd0721ea4c7a6c2ec8b309ff57d74d88f08d4c23.tar.xz linux-dev-dd0721ea4c7a6c2ec8b309ff57d74d88f08d4c23.zip | |
net: pcs: xpcs: add support for NXP SJA1105
The NXP SJA1105 DSA switch integrates a Synopsys SGMII XPCS on port 4.
The generic code works fine, except there is an integration issue which
needs to be dealt with: in this switch, the XPCS is integrated with a
PMA that has the TX lane polarity inverted by default (PLUS is MINUS,
MINUS is PLUS).
To obtain normal non-inverted behavior, the TX lane polarity must be
inverted in the PCS, via the DIGITAL_CONTROL_2 register.
We introduce a pma_config() method in xpcs_compat which is called by the
phylink_pcs_config() implementation.
Also, the NXP SJA1105 returns all zeroes in the PHY ID registers 2 and 3.
We need to hack up an ad-hoc PHY ID (OUI is zero, device ID is 1) in
order for the XPCS driver to recognize it. This PHY ID is added to the
public include/linux/pcs/pcs-xpcs.h for that reason (for the sja1105
driver to be able to use it in a later patch).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'MAINTAINERS')
| -rw-r--r-- | MAINTAINERS | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index c8214235380e..349a87b42d3c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13203,6 +13203,7 @@ M: Vladimir Oltean <olteanv@gmail.com> L: linux-kernel@vger.kernel.org S: Maintained F: drivers/net/dsa/sja1105 +F: drivers/net/pcs/pcs-xpcs-nxp.c NXP TDA998X DRM DRIVER M: Russell King <linux@armlinux.org.uk> |