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| author |   Vineet Gupta <vgupta@synopsys.com> | 2014-10-13 18:13:35 +0530 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2015-06-19 18:09:34 +0530 |
| commit | 09f3b37e4e3bbe22444617c273a3c046aade5db2 (patch) | |
| tree | b3f4bb8e144576aa0de20e2810a0fdbc857c1b1b /arch/arc/include/asm/arcregs.h | |
| parent | ARC: entry.S: common'ize scrtach reg freeup in intr + exceptions (diff) | |
| download | linux-dev-09f3b37e4e3bbe22444617c273a3c046aade5db2.tar.xz linux-dev-09f3b37e4e3bbe22444617c273a3c046aade5db2.zip | |
ARC: entry.S: Introduce INTERRUPT_{PROLOGUE,EPILOGUE}
-common'ize macros for level 1 and level 2 interrupts
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/include/asm/arcregs.h')
| -rw-r--r-- | arch/arc/include/asm/arcregs.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h index 56e2f1f2a3c5..3ab66fcd9df1 100644 --- a/arch/arc/include/asm/arcregs.h +++ b/arch/arc/include/asm/arcregs.h @@ -76,9 +76,6 @@ #define ECR_C_BIT_DTLB_LD_MISS 8 #define ECR_C_BIT_DTLB_ST_MISS 9 -/* Dummy ECR values for Interrupts */ -#define event_IRQ1 0x0031abcd -#define event_IRQ2 0x0032abcd /* Auxiliary registers */ #define AUX_IDENTITY 4 |