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authorVineet Gupta <vgupta@synopsys.com>2015-10-02 12:25:35 +0530
committerVineet Gupta <vgupta@synopsys.com>2015-10-17 17:48:25 +0530
commitb598e17f6a7a3a9bb6e0953ef586ee3697b59fce (patch)
treebd1be6693296b7b36a4a65105b827f2becae5de6 /arch/arc/include/asm/arcregs.h
parentARC: mm: MMU v1..v3 only selectable for ARCompact ISA based cores (diff)
downloadlinux-dev-b598e17f6a7a3a9bb6e0953ef586ee3697b59fce.tar.xz
linux-dev-b598e17f6a7a3a9bb6e0953ef586ee3697b59fce.zip
ARC: mm: compute TLB size as needed from ways * sets
This frees up some bits to hold more high level info such as PAE being present, w/o increasing the size of already bloated cpuinfo struct Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/include/asm/arcregs.h')
-rw-r--r--arch/arc/include/asm/arcregs.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 431e82893fc8..dc9e65a8d722 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -327,8 +327,8 @@ struct bcr_generic {
*/
struct cpuinfo_arc_mmu {
- unsigned int ver:4, pg_sz_k:8, s_pg_sz_m:8, u_dtlb:6, u_itlb:6;
- unsigned int num_tlb:16, sets:12, ways:4;
+ unsigned int ver:4, pg_sz_k:8, s_pg_sz_m:8, pad:12;
+ unsigned int sets:12, ways:4, u_dtlb:8, u_itlb:8;
};
struct cpuinfo_arc_cache {