diff options
| author |   Vineet Gupta <vgupta@kernel.org> | 2020-10-01 19:39:15 -0700 |
|---|---|---|
| committer | Vineet Gupta <vgupta@kernel.org> | 2021-08-25 15:53:19 -0700 |
| commit | 2cc1121bc993ca3090cc4267bc38d3da61b68602 (patch) | |
| tree | ff0015e17dd700f19577e29c50f1b8167d551cc6 /arch/arc/include/asm/pgtable.h | |
| parent | ARC: mm: move MMU specific bits out of entry code ... (diff) | |
| download | linux-dev-2cc1121bc993ca3090cc4267bc38d3da61b68602.tar.xz linux-dev-2cc1121bc993ca3090cc4267bc38d3da61b68602.zip | |
ARC: mm: disintegrate mmu.h (arcv2 bits out)
non functional change
Tested-by: kernel test robot <lkp@intel.com>
Signed-off-by: Vineet Gupta <vgupta@kernel.org>
Diffstat (limited to 'arch/arc/include/asm/pgtable.h')
| -rw-r--r-- | arch/arc/include/asm/pgtable.h | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h index f762bacb2358..de4576e8d17a 100644 --- a/arch/arc/include/asm/pgtable.h +++ b/arch/arc/include/asm/pgtable.h @@ -103,12 +103,6 @@ */ #define PAGE_KERNEL __pgprot(_K_PAGE_PERMS | _PAGE_CACHEABLE) -/* Masks for actual TLB "PD"s */ -#define PTE_BITS_IN_PD0 (_PAGE_GLOBAL | _PAGE_PRESENT | _PAGE_HW_SZ) -#define PTE_BITS_RWX (_PAGE_EXECUTE | _PAGE_WRITE | _PAGE_READ) - -#define PTE_BITS_NON_RWX_IN_PD1 (PAGE_MASK_PHYS | _PAGE_CACHEABLE) - /************************************************************************** * Mapping of vm_flags (Generic VM) to PTE flags (arch specific) * |