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authorVineet Gupta <vgupta@synopsys.com>2016-05-30 19:21:22 +0530
committerVineet Gupta <vgupta@synopsys.com>2016-05-30 22:45:04 +0530
commit60f2b4b8af548150cc56bf6fd213e47897964794 (patch)
tree6a2e3317963e0315259707df98f3fd0b12ce1f53 /arch/arc/kernel/entry-compact.S
parentarc: Get rid of root core-frequency property (diff)
downloadlinux-dev-60f2b4b8af548150cc56bf6fd213e47897964794.tar.xz
linux-dev-60f2b4b8af548150cc56bf6fd213e47897964794.zip
ARC: [intc-compact] simplify code for 2 priority levels
ARC700 support for 2 interrupt priorities historically allowed even slow perpherals such as emac and uart to setup high priority interrupts which was wrong from the beginning as they could possibly delay the more critical timer interrupt. The hardware support for 2 level interrupts in ARCompact is less than ideal anyways (judging from the "hacks" in low level entry code and thus is not used in productions systems I know of. So reduce the scope of this to timer only, thereby reducing a bunch of complexity. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/kernel/entry-compact.S')
-rw-r--r--arch/arc/kernel/entry-compact.S18
1 files changed, 2 insertions, 16 deletions
diff --git a/arch/arc/kernel/entry-compact.S b/arch/arc/kernel/entry-compact.S
index 0cb0abaa0479..98812c1248df 100644
--- a/arch/arc/kernel/entry-compact.S
+++ b/arch/arc/kernel/entry-compact.S
@@ -91,27 +91,13 @@ VECTOR mem_service ; 0x8, Mem exception (0x1)
VECTOR instr_service ; 0x10, Instrn Error (0x2)
; ******************** Device ISRs **********************
-#ifdef CONFIG_ARC_IRQ3_LV2
-VECTOR handle_interrupt_level2
-#else
-VECTOR handle_interrupt_level1
-#endif
-
-VECTOR handle_interrupt_level1
-
-#ifdef CONFIG_ARC_IRQ5_LV2
-VECTOR handle_interrupt_level2
-#else
-VECTOR handle_interrupt_level1
-#endif
-
-#ifdef CONFIG_ARC_IRQ6_LV2
+#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
VECTOR handle_interrupt_level2
#else
VECTOR handle_interrupt_level1
#endif
-.rept 25
+.rept 28
VECTOR handle_interrupt_level1 ; Other devices
.endr