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| author |   Eddie James <eajames@linux.ibm.com> | 2020-04-20 15:26:09 -0500 |
|---|---|---|
| committer |   Joel Stanley <joel@jms.id.au> | 2020-05-05 16:37:17 +0930 |
| commit | f90fe8d3b242aafe3cf1dd512bff83c704f70558 (patch) | |
| tree | 518c3dd6aa060a1854ab9e84218f24c851743c3b /arch/arm/boot/dts/aspeed-g6.dtsi | |
| parent | ARM: dts: aspeed: ast2600: Add XDMA Engine (diff) | |
| download | linux-dev-f90fe8d3b242aafe3cf1dd512bff83c704f70558.tar.xz linux-dev-f90fe8d3b242aafe3cf1dd512bff83c704f70558.zip | |
ARM: dts: Aspeed: AST2600: Add XDMA PCI-E root control reset
The AST2600 XDMA engine requires the PCI-E root control reset be cleared
as well, so add a phandle to that syscon reset.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g6.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/aspeed-g6.dtsi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index eb09506510f1..98102968627b 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -343,7 +343,8 @@ compatible = "aspeed,ast2600-xdma"; reg = <0x1e6e7000 0x100>; clocks = <&syscon ASPEED_CLK_GATE_BCLK>; - resets = <&syscon ASPEED_RESET_DEV_XDMA>; + resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>; + reset-names = "device", "root-complex"; interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, <&scu_ic0 2>; pcie-device = "bmc"; |