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authorEddie James <eajames@linux.ibm.com>2020-01-15 15:29:42 -0600
committerJoel Stanley <joel@jms.id.au>2020-05-05 15:35:51 +0930
commitf9950ad272051374f15c559ce71934bdfa072ebd (patch)
tree4a5285e4a251a33ef9e2e72704ee8ccdec9d5ed8 /arch/arm/boot/dts/aspeed-g6.dtsi
parentARM: dts: aspeed: ast2500: Add SCU interrupt controller (diff)
downloadlinux-dev-f9950ad272051374f15c559ce71934bdfa072ebd.tar.xz
linux-dev-f9950ad272051374f15c559ce71934bdfa072ebd.zip
ARM: dts: aspeed: ast2600: Add SCU interrupt controllers
Add nodes for the interrupt controllers provided by the SCU. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g6.dtsi')
-rw-r--r--arch/arm/boot/dts/aspeed-g6.dtsi16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 0a29b3b57a9d..525103f45074 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -313,6 +313,22 @@
compatible = "aspeed,ast2600-smpmem";
reg = <0x180 0x40>;
};
+
+ scu_ic0: interrupt-controller@560 {
+ #interrupt-cells = <1>;
+ compatible = "aspeed,ast2600-scu-ic0";
+ reg = <0x560 0x4>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ };
+
+ scu_ic1: interrupt-controller@570 {
+ #interrupt-cells = <1>;
+ compatible = "aspeed,ast2600-scu-ic1";
+ reg = <0x570 0x4>;
+ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ };
};
rng: hwrng@1e6e2524 {