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| author |   Rafał Miłecki <rafal@milecki.pl> | 2016-12-07 08:56:55 +0100 |
|---|---|---|
| committer |   Florian Fainelli <f.fainelli@gmail.com> | 2017-01-18 17:18:11 -0800 |
| commit | a503cf0cbe66f153f77fe9d0ecaa12e65b2a42a5 (patch) | |
| tree | 0b55267c736e4dcc1441cf53c4871920756dc9d2 /arch/arm/boot/dts/bcm53573.dtsi | |
| parent | ARM: dts: BCM5301X: Specify all RAM by including an extra block (diff) | |
| download | linux-dev-a503cf0cbe66f153f77fe9d0ecaa12e65b2a42a5.tar.xz linux-dev-a503cf0cbe66f153f77fe9d0ecaa12e65b2a42a5.zip | |
ARM: dts: BCM53573: Specify USB ports of on-SoC controllers
Broadcom OHCI and EHCI controllers always have 2 ports each on the root
hub. Describe them in DT to allow specifying extra info or referencing
port nodes.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/bcm53573.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/bcm53573.dtsi | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm53573.dtsi b/arch/arm/boot/dts/bcm53573.dtsi index e2c496a96c32..2da04d0a7348 100644 --- a/arch/arm/boot/dts/bcm53573.dtsi +++ b/arch/arm/boot/dts/bcm53573.dtsi @@ -124,6 +124,17 @@ reg = <0x4000 0x1000>; interrupt-parent = <&gic>; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + + #address-cells = <1>; + #size-cells = <0>; + + ehci_port1: port@1 { + reg = <1>; + }; + + ehci_port2: port@2 { + reg = <2>; + }; }; ohci: ohci@d000 { @@ -133,6 +144,17 @@ reg = <0xd000 0x1000>; interrupt-parent = <&gic>; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + + #address-cells = <1>; + #size-cells = <0>; + + ohci_port1: port@1 { + reg = <1>; + }; + + ohci_port2: port@2 { + reg = <2>; + }; }; }; |