diff options
| author |   Grygorii Strashko <grygorii.strashko@ti.com> | 2016-08-30 17:58:01 +0300 |
|---|---|---|
| committer |   Tony Lindgren <tony@atomide.com> | 2016-08-31 07:37:40 -0700 |
| commit | c097338ebd3f7a0920dbe1a5d9bf276207f7b024 (patch) | |
| tree | a1ce6866656760d583a79351d6be0c0e54aa6cab /arch/arm/boot/dts/dra7.dtsi | |
| parent | ARM: dts: dra7: Fix clock data for gmac_gmii_ref_clk_div (diff) | |
| download | linux-dev-c097338ebd3f7a0920dbe1a5d9bf276207f7b024.tar.xz linux-dev-c097338ebd3f7a0920dbe1a5d9bf276207f7b024.zip | |
ARM: dts: dra7: cpsw: fix clocks tree
Current clocks tree definition for CPSW/CPTS doesn't
correspond TRM for dra7/am57 SoCs.
CPTS: has to be sourced from gmac_rft_clk_mux clock
CPSW: DPLL_GMAC -> CLKOUT_M2 -> GMAC_250M_CLK -> 1/2 ->
-> GMAC_MAIN_CLK (125 MHZ)
Hence, correct clock tree for GMAC_MAIN_CLK and use proper
clock for CPTS. This also require updating of CPTS clock
multiplier.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/dra7.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/dra7.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index fbd5a3e49955..1c1c3c20f267 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1719,7 +1719,7 @@ mac: ethernet@48484000 { compatible = "ti,dra7-cpsw","ti,cpsw"; ti,hwmods = "gmac"; - clocks = <&dpll_gmac_ck>, <&gmac_gmii_ref_clk_div>; + clocks = <&gmac_main_clk>, <&gmac_rft_clk_mux>; clock-names = "fck", "cpts"; cpdma_channels = <8>; ale_entries = <1024>; @@ -1728,7 +1728,7 @@ mac_control = <0x20>; slaves = <2>; active_slave = <0>; - cpts_clock_mult = <0x80000000>; + cpts_clock_mult = <0x784CFE14>; cpts_clock_shift = <29>; reg = <0x48484000 0x1000 0x48485200 0x2E00>; |