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| author |   Hari Nagalla <hnagalla@ti.com> | 2018-04-27 17:38:59 +0530 |
|---|---|---|
| committer |   Tony Lindgren <tony@atomide.com> | 2018-05-03 10:32:15 -0700 |
| commit | 70539a529806f3b7d4b66282347e17599dacd64b (patch) | |
| tree | 197eafe1516c5ea2ecc40a4a0573cc345bf9348c /arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi | |
| parent | ARM: dts: am57xx-beagle-x15/am57xx-idk: Fix pinctrl-names (diff) | |
| download | linux-dev-70539a529806f3b7d4b66282347e17599dacd64b.tar.xz linux-dev-70539a529806f3b7d4b66282347e17599dacd64b.zip | |
ARM: dts: dra72-evm-common: Add wilink8 wlan support
Wilink8 module is a combo wireless connectivity card based
on Texas Instrument's wl18xx solution.
Add support for the wlan capabilities of this module by muxing
the relevant mmc lines, and setting the required device-tree
data.
Signed-off-by: Eyal Reizer <eyalr@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
[nsekhar@ti.com: drop WLAN_EN pinmux. It should be done by bootloader.
Also, some commit message adjustments]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi b/arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi index 088013c6dc6e..edad87c4292c 100644 --- a/arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi +++ b/arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi @@ -202,6 +202,17 @@ DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ >; }; + + mmc4_pins_default: mmc4_pins_default { + pinctrl-single,pins = < + DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.mmc4_clk */ + DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */ + DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */ + DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_txd.mmc4_dat1 */ + DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */ + DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */ + >; + }; }; &dra7_iodelay_core { |