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| author |   Chanwoo Choi <cw00.choi@samsung.com> | 2016-04-11 12:57:54 +0900 |
|---|---|---|
| committer |   Krzysztof Kozlowski <k.kozlowski@samsung.com> | 2016-05-03 12:22:58 +0200 |
| commit | f0ba9eaa9129043ce12cf97b1f8d6fad33934a40 (patch) | |
| tree | e21ce1df36066e53b63399ccb0edfca44c0f3e4b /arch/arm/boot/dts/exynos4412-trats2.dts | |
| parent | ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos4x12 (diff) | |
| download | linux-dev-f0ba9eaa9129043ce12cf97b1f8d6fad33934a40.tar.xz linux-dev-f0ba9eaa9129043ce12cf97b1f8d6fad33934a40.zip | |
ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4210
This patch adds the bus nodes for Exynos4210 SoC. Exynos4210 SoC has
one power line for all buses to translate data between DRAM and sub-blocks.
Following list specifies the detailed relation between DRAM and sub-blocks:
- DMC/ACP clock for DMC (Dynamic Memory Controller)
- ACLK200 clock for LCD0
- ACLK100 clock for PERIL/PERIR/MFC(PCLK)
- ACLK160 clock for CAM/TV/LCD0/LCD1
- ACLK133 clock for FSYS/GPS
- GDL/GDR clock for LEFTBUS/RIGHTBUS
- SCLK_MFC clock for MFC
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos4412-trats2.dts')
0 files changed, 0 insertions, 0 deletions