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authorLinus Walleij <linus.walleij@linaro.org>2017-11-06 00:05:28 +0100
committerLinus Walleij <linus.walleij@linaro.org>2018-01-17 00:24:11 +0100
commit8f3093b34811475a70ecdd6180cc5d3b73a7433f (patch)
tree3eafeb3617532d7a238f886135c5628f5837cab8 /arch/arm/boot/dts/gemini.dtsi
parentARM: dts: Add TVE/TVC and ILI9322 panel to DIR-685 (diff)
downloadlinux-dev-8f3093b34811475a70ecdd6180cc5d3b73a7433f.tar.xz
linux-dev-8f3093b34811475a70ecdd6180cc5d3b73a7433f.zip
ARM: dts: Add ethernet to the Gemini SoC
This adds the Gemini ethernet node to the Gemini SoC. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/gemini.dtsi')
-rw-r--r--arch/arm/boot/dts/gemini.dtsi44
1 files changed, 43 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/gemini.dtsi b/arch/arm/boot/dts/gemini.dtsi
index cb5c925bd597..0568baca500a 100644
--- a/arch/arm/boot/dts/gemini.dtsi
+++ b/arch/arm/boot/dts/gemini.dtsi
@@ -114,9 +114,16 @@
};
};
gmii_default_pins: pinctrl-gmii {
+ /*
+ * Only activate GMAC0 by default since
+ * GMAC1 will overlap with 8 GPIO lines
+ * gpio2a, gpio2b. Overlay groups with
+ * "gmii_gmac0_grp", "gmii_gmac1_grp" for
+ * both ethernet interfaces.
+ */
mux {
function = "gmii";
- groups = "gmiigrp";
+ groups = "gmii_gmac0_grp";
};
};
pci_default_pins: pinctrl-pci {
@@ -316,6 +323,41 @@
};
};
+ ethernet@60000000 {
+ compatible = "cortina,gemini-ethernet";
+ reg = <0x60000000 0x4000>, /* Global registers, queue */
+ <0x60004000 0x2000>, /* V-bit */
+ <0x60006000 0x2000>; /* A-bit */
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmii_default_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gmac0: ethernet-port@0 {
+ compatible = "cortina,gemini-ethernet-port";
+ reg = <0x60008000 0x2000>, /* Port 0 DMA/TOE */
+ <0x6000a000 0x2000>; /* Port 0 GMAC */
+ interrupt-parent = <&intcon>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&syscon GEMINI_RESET_GMAC0>;
+ clocks = <&syscon GEMINI_CLK_GATE_GMAC0>;
+ clock-names = "PCLK";
+ };
+
+ gmac1: ethernet-port@1 {
+ compatible = "cortina,gemini-ethernet-port";
+ reg = <0x6000c000 0x2000>, /* Port 1 DMA/TOE */
+ <0x6000e000 0x2000>; /* Port 1 GMAC */
+ interrupt-parent = <&intcon>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&syscon GEMINI_RESET_GMAC1>;
+ clocks = <&syscon GEMINI_CLK_GATE_GMAC1>;
+ clock-names = "PCLK";
+ };
+ };
+
ata@63000000 {
compatible = "cortina,gemini-pata", "faraday,ftide010";
reg = <0x63000000 0x1000>;