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authorFrieder Schrempf <frieder.schrempf@kontron.de>2018-10-18 09:45:04 +0200
committerShawn Guo <shawnguo@kernel.org>2018-12-10 10:02:24 +0800
commit4ca7dbdb06c1eda3ba68846c78ebbaefd70c55c0 (patch)
tree3b12e06a5e41c983ec4e5af5032ef5100ac3d560 /arch/arm/boot/dts/imx6sl.dtsi
parentARM: dts: imx6sx: specify proper clock for nodes with dummy clock (diff)
downloadlinux-dev-4ca7dbdb06c1eda3ba68846c78ebbaefd70c55c0.tar.xz
linux-dev-4ca7dbdb06c1eda3ba68846c78ebbaefd70c55c0.zip
ARM: dts: imx: Add dummy PHYs for HSIC-only USB controllers
Some SOCs in the i.MX6 family have a USB host controller that is only capable of the HSIC interface and has no on-board PHY. To be able to use these controllers, we need to add "usb-nop-xceiv" dummy PHYs. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6sl.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 557d3fda1db9..97e49aa7b033 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -110,6 +110,11 @@
interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
};
+ usbphynop1: usbphynop1 {
+ compatible = "usb-nop-xceiv";
+ #phy-cells = <0>;
+ };
+
soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -814,6 +819,8 @@
reg = <0x02184400 0x200>;
interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SL_CLK_USBOH3>;
+ fsl,usbphy = <&usbphynop1>;
+ phy_type = "hsic";
fsl,usbmisc = <&usbmisc 2>;
dr_mode = "host";
ahb-burst-config = <0x0>;