diff options
| author |   Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2020-05-12 23:51:47 +0200 |
|---|---|---|
| committer |   Kevin Hilman <khilman@baylibre.com> | 2020-05-19 16:18:58 -0700 |
| commit | b632506c5af22a9a7c63674fc605d24cf94d585b (patch) | |
| tree | 9a52722a3e81da49b014e2e6fce8be641b454bb1 /arch/arm/boot/dts/meson8b.dtsi | |
| parent | ARM: dts: meson8m2: Use the Meson8m2 specific USB2 PHY compatible (diff) | |
| download | linux-dev-b632506c5af22a9a7c63674fc605d24cf94d585b.tar.xz linux-dev-b632506c5af22a9a7c63674fc605d24cf94d585b.zip | |
ARM: dts: meson: Add the Ethernet "timing-adjustment" clock
Add the "timing-adjusment" clock now that we now that this is connected
to the PRG_ETHERNET registers. It is used internally to generate the
RGMII RX delay no the MAC side (if needed).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200512215148.540322-2-martin.blumenstingl@googlemail.com
Diffstat (limited to 'arch/arm/boot/dts/meson8b.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/meson8b.dtsi | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index e34b039b9357..ba36168b9c1b 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -425,8 +425,9 @@ clocks = <&clkc CLKID_ETH>, <&clkc CLKID_MPLL2>, - <&clkc CLKID_MPLL2>; - clock-names = "stmmaceth", "clkin0", "clkin1"; + <&clkc CLKID_MPLL2>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment"; rx-fifo-depth = <4096>; tx-fifo-depth = <2048>; |