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| author |   Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2019-12-25 02:06:05 +0100 |
|---|---|---|
| committer |   Kevin Hilman <khilman@baylibre.com> | 2020-01-08 11:00:58 -0800 |
| commit | da256557441700d4f3f95c6e94ef57794acd6bfc (patch) | |
| tree | e864c8d9f49ca91ed740f80f19c87ba83983e003 /arch/arm/boot/dts/meson8b.dtsi | |
| parent | ARM: dts: meson8b: add the DDR clock controller (diff) | |
| download | linux-dev-da256557441700d4f3f95c6e94ef57794acd6bfc.tar.xz linux-dev-da256557441700d4f3f95c6e94ef57794acd6bfc.zip | |
ARM: dts: meson8b: fix the clock controller compatible string
The Meson8b clock controller is an evolution of the Meson8 clock
controller. The clock controller on Meson8b contains two identical mali
clock trees for glitch-free rate switching.
Use the correct compatible string to make use of the glitch free mux.
Fixes: b6db3936f2833c ("ARM: dts: meson: switch the clock controller to the HHI register area")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm/boot/dts/meson8b.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/meson8b.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 8ac8bdfaf58f..5b5791924753 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -442,7 +442,7 @@ &hhi { clkc: clock-controller { - compatible = "amlogic,meson8-clkc"; + compatible = "amlogic,meson8b-clkc"; clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>; clock-names = "xtal", "ddr_pll"; #clock-cells = <1>; |