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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2021-01-02 21:59:04 +0100
committerKevin Hilman <khilman@baylibre.com>2021-02-03 10:22:10 -0800
commitfb606cdadbfca902fe7e9619835e1db66141c640 (patch)
tree9184bf423eed4c2795d22dfa109d88a6f72291dc /arch/arm/boot/dts/meson8b.dtsi
parentdt-bindings: Amlogic: add the documentation for the SECBUS2 registers (diff)
downloadlinux-dev-fb606cdadbfca902fe7e9619835e1db66141c640.tar.xz
linux-dev-fb606cdadbfca902fe7e9619835e1db66141c640.zip
ARM: dts: meson: add the AO ARC remote processor
The 32-bit Amlogic Meson SoCs embed an ARC processor in the Always-On power domain which is typically used for managing system suspend. The memory for this ARC core is taken from the AHB SRAM area. Depending on the actual SoC a different ARC core is used: - Meson6 and earlier: some ARCv1 ISA based core (probably an ARC625) - Meson8 and later: an ARC EM4 (ARCv2 ISA) based core Add the device-tree node for this remote-processor along with the required SRAM sections, clocks and reset-lines. Also use the SoC-specific compatible string to manage any differences (should they exist). On Meson8, Meson8b and Meson8m2 the "secbus2" IO region is needed as some bits need to be programmed there. Add this IO region for those SoCs as well. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20210102205904.2691120-6-martin.blumenstingl@googlemail.com
Diffstat (limited to 'arch/arm/boot/dts/meson8b.dtsi')
-rw-r--r--arch/arm/boot/dts/meson8b.dtsi21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index 2401cdf5f751..a285c34aef94 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -266,6 +266,14 @@
};
};
+&ao_arc_rproc {
+ compatible= "amlogic,meson8b-ao-arc", "amlogic,meson-mx-ao-arc";
+ amlogic,secbus2 = <&secbus2>;
+ sram = <&ao_arc_sram>;
+ resets = <&reset RESET_MEDIA_CPU>;
+ clocks = <&clkc CLKID_AO_MEDIA_CPU>;
+};
+
&cbus {
reset: reset-controller@4404 {
compatible = "amlogic,meson8b-reset";
@@ -410,6 +418,12 @@
};
&ahb_sram {
+ ao_arc_sram: ao-arc-sram@0 {
+ compatible = "amlogic,meson8b-ao-arc-sram";
+ reg = <0x0 0x8000>;
+ pool;
+ };
+
smp-sram@1ff80 {
compatible = "amlogic,meson8b-smp-sram";
reg = <0x1ff80 0x8>;
@@ -574,6 +588,13 @@
clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk";
};
+&secbus {
+ secbus2: system-controller@4000 {
+ compatible = "amlogic,meson8b-secbus2", "syscon";
+ reg = <0x4000 0x2000>;
+ };
+};
+
&sdio {
compatible = "amlogic,meson8b-sdio", "amlogic,meson-mx-sdio";
clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>;