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| author |   Suman Anna <s-anna@ti.com> | 2020-07-09 18:19:45 -0500 |
|---|---|---|
| committer |   Tony Lindgren <tony@atomide.com> | 2020-07-13 11:11:38 -0700 |
| commit | 5ce170cdaa64e31ddf87fbc4ebf06c64935a7b42 (patch) | |
| tree | dc53a7c069063114db807a7bebc624e147ea290f /arch/arm/boot/dts/omap4.dtsi | |
| parent | ARM: dts: omap4: Update the DSP node (diff) | |
| download | linux-dev-5ce170cdaa64e31ddf87fbc4ebf06c64935a7b42.tar.xz linux-dev-5ce170cdaa64e31ddf87fbc4ebf06c64935a7b42.zip | |
ARM: dts: omap4: Add IPU DT node
The DT node for the Dual-Cortex M3 IPU processor sub-system has
been added for OMAP4 SoCs. The L2RAM memory region information
has been added to the node through the 'reg' and 'reg-names'
properties. The node has the 'iommus', 'clocks', 'resets',
'mboxes' and 'firmware' properties also added, and is disabled
for now. It should be enabled as per the individual product
configuration in the corresponding board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap4.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/omap4.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index e1b6f19ed6f4..c100ccc95ca5 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -284,6 +284,18 @@ status = "disabled"; }; + ipu: ipu@55020000 { + compatible = "ti,omap4-ipu"; + reg = <0x55020000 0x10000>; + reg-names = "l2ram"; + iommus = <&mmu_ipu>; + resets = <&prm_core 0>, <&prm_core 1>; + clocks = <&ducati_clkctrl OMAP4_IPU_CLKCTRL 0>; + firmware-name = "omap4-ipu-fw.xem3"; + mboxes = <&mailbox &mbox_ipu>; + status = "disabled"; + }; + aes1_target: target-module@4b501000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x4b501080 0x4>, |