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| author |   H. Peter Anvin <hpa@linux.intel.com> | 2014-02-07 11:27:30 -0800 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2014-02-07 11:27:30 -0800 |
| commit | a3b072cd180c12e8fe0ece9487b9065808327640 (patch) | |
| tree | 62b982041be84748852d77cdf6ca5639ef40858f /arch/arm/boot/dts/pxa27x.dtsi | |
| parent | x86, microcode, AMD: Unify valid container checks (diff) | |
| parent | x86/efi: Allow mapping BGRT on x86-32 (diff) | |
| download | linux-dev-a3b072cd180c12e8fe0ece9487b9065808327640.tar.xz linux-dev-a3b072cd180c12e8fe0ece9487b9065808327640.zip | |
Merge tag 'efi-urgent' into x86/urgent
* Avoid WARN_ON() when mapping BGRT on Baytrail (EFI 32-bit).
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/arm/boot/dts/pxa27x.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/pxa27x.dtsi | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi index d7c5d721a5c7..a70546945985 100644 --- a/arch/arm/boot/dts/pxa27x.dtsi +++ b/arch/arm/boot/dts/pxa27x.dtsi @@ -10,5 +10,29 @@ marvell,intc-priority; marvell,intc-nr-irqs = <34>; }; + + pwm0: pwm@40b00000 { + compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; + reg = <0x40b00000 0x10>; + #pwm-cells = <1>; + }; + + pwm1: pwm@40b00010 { + compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; + reg = <0x40b00010 0x10>; + #pwm-cells = <1>; + }; + + pwm2: pwm@40c00000 { + compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; + reg = <0x40c00000 0x10>; + #pwm-cells = <1>; + }; + + pwm3: pwm@40c00010 { + compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; + reg = <0x40c00010 0x10>; + #pwm-cells = <1>; + }; }; }; |