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| author |   Heiko Stuebner <heiko@sntech.de> | 2014-09-10 16:28:02 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2014-09-13 20:28:13 +0200 |
| commit | 39c2bd782a2c50c51bced96ad3f2c97d4997d949 (patch) | |
| tree | 35b08466012771a3c34375f1d06d3ef79337853a /arch/arm/boot/dts/rk3066a.dtsi | |
| parent | ARM: dts: rockchip: enable usb ports on Radxa Rock (diff) | |
| download | linux-dev-39c2bd782a2c50c51bced96ad3f2c97d4997d949.tar.xz linux-dev-39c2bd782a2c50c51bced96ad3f2c97d4997d949.zip | |
ARM: dts: rockchip: add Cortex-A9 SPI controller nodes
This adds basic spi nodes and pinctrl settings to the rk3066 and rk3188
devicetree files.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3066a.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3066a.dtsi | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 879a818fba51..8021eed21e39 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -238,6 +238,42 @@ }; }; + spi0 { + spi0_clk: spi0-clk { + rockchip,pins = <RK_GPIO1 5 RK_FUNC_2 &pcfg_pull_default>; + }; + spi0_cs0: spi0-cs0 { + rockchip,pins = <RK_GPIO1 4 RK_FUNC_2 &pcfg_pull_default>; + }; + spi0_tx: spi0-tx { + rockchip,pins = <RK_GPIO1 7 RK_FUNC_2 &pcfg_pull_default>; + }; + spi0_rx: spi0-rx { + rockchip,pins = <RK_GPIO1 6 RK_FUNC_2 &pcfg_pull_default>; + }; + spi0_cs1: spi0-cs1 { + rockchip,pins = <RK_GPIO4 15 RK_FUNC_1 &pcfg_pull_default>; + }; + }; + + spi1 { + spi1_clk: spi1-clk { + rockchip,pins = <RK_GPIO2 19 RK_FUNC_2 &pcfg_pull_default>; + }; + spi1_cs0: spi1-cs0 { + rockchip,pins = <RK_GPIO2 20 RK_FUNC_2 &pcfg_pull_default>; + }; + spi1_rx: spi1-rx { + rockchip,pins = <RK_GPIO2 22 RK_FUNC_2 &pcfg_pull_default>; + }; + spi1_tx: spi1-tx { + rockchip,pins = <RK_GPIO2 21 RK_FUNC_2 &pcfg_pull_default>; + }; + spi1_cs1: spi1-cs1 { + rockchip,pins = <RK_GPIO2 23 RK_FUNC_2 &pcfg_pull_default>; + }; + }; + uart0 { uart0_xfer: uart0-xfer { rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_default>, @@ -406,6 +442,16 @@ pinctrl-0 = <&pwm3_out>; }; +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_xfer>; |