aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/rk3288-tinker.dtsi
diff options
context:
space:
mode:
authorHeiko Stuebner <heiko@sntech.de>2018-09-20 11:34:36 +0200
committerHeiko Stuebner <heiko@sntech.de>2018-09-24 15:48:29 +0200
commita2df0984e73fd9e1dad5fc3f1c307ec3de395e30 (patch)
tree2be2809b80661ea208cc709a87a92090581d1b92 /arch/arm/boot/dts/rk3288-tinker.dtsi
parentARM: dts: rockchip: Fix erroneous SPI bus dtc warnings on rk3036 (diff)
downloadlinux-dev-a2df0984e73fd9e1dad5fc3f1c307ec3de395e30.tar.xz
linux-dev-a2df0984e73fd9e1dad5fc3f1c307ec3de395e30.zip
ARM: dts: rockchip: explicitly set vcc_sd0 pin to gpio on rk3188-radxarock
It is good practice to make the setting of gpio-pinctrls explicitly in the devicetree, and in this case even necessary. Rockchip boards start with iomux settings set to gpio for most pins and while the linux pinctrl driver also implicitly sets the gpio function if a pin is requested as gpio that is not necessarily true for other drivers. The issue in question stems from uboot, where the sdmmc_pwr pin is set to function 1 (sdmmc-power) by the bootrom when reading the 1st-stage loader. The regulator controlled by the pin is active-low though, so when the dwmmc hw-block sets its enabled bit, it actually disables the regulator. By changing the pin back to gpio we fix that behaviour. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288-tinker.dtsi')
0 files changed, 0 insertions, 0 deletions