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| author |   Heiko Stuebner <heiko@sntech.de> | 2017-08-26 14:06:01 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2017-09-22 11:18:08 +0200 |
| commit | 4fcac83b4f2b98f7e9b71d91e44680528b3c2cd4 (patch) | |
| tree | a850668d0701cd21c42b0689f794a51d9f487a33 /arch/arm/boot/dts/rk3xxx.dtsi | |
| parent | ARM: dts: rockchip: add rk322x gpu node (diff) | |
| download | linux-dev-4fcac83b4f2b98f7e9b71d91e44680528b3c2cd4.tar.xz linux-dev-4fcac83b4f2b98f7e9b71d91e44680528b3c2cd4.zip | |
ARM: dts: rockchip: add gpu nodes on rk3066/rk3188
The old Cortex-A9 socs use Mali400 GPUs with 4 pixel processors.
This adds the core gpu nodes with the per-soc interrupts but sharing
the core node.
Rockchip SoCs use only one clock to supply the GPUs
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3xxx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3xxx.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 4aa6f60d6a22..49584b6a4195 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -117,6 +117,17 @@ clock-output-names = "xin24m"; }; + gpu: gpu@10090000 { + compatible = "arm,mali-400"; + reg = <0x10090000 0x10000>; + clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>; + clock-names = "core", "bus"; + assigned-clocks = <&cru ACLK_GPU>; + assigned-clock-rates = <100000000>; + resets = <&cru SRST_GPU>; + status = "disabled"; + }; + L2: l2-cache-controller@10138000 { compatible = "arm,pl310-cache"; reg = <0x10138000 0x1000>; |