aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
diff options
context:
space:
mode:
authorJames Morris <james.l.morris@oracle.com>2014-07-17 02:10:27 +1000
committerJames Morris <james.l.morris@oracle.com>2014-07-17 02:10:27 +1000
commitbd89bb78f35fd175db7a9cfc504d789b6ca0f7b0 (patch)
treedee9f8b31f3d6d2fb141541da88e1cc1329b017e /arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
parentMerge commit 'v3.15' into next (diff)
parentLinux 3.16-rc5 (diff)
downloadlinux-dev-bd89bb78f35fd175db7a9cfc504d789b6ca0f7b0.tar.xz
linux-dev-bd89bb78f35fd175db7a9cfc504d789b6ca0f7b0.zip
Sync with the changes pushed by Serge in the last merge window.
Diffstat (limited to 'arch/arm/boot/dts/socfpga_cyclone5_socrates.dts')
-rw-r--r--arch/arm/boot/dts/socfpga_cyclone5_socrates.dts50
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
new file mode 100644
index 000000000000..a1814b457450
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "socfpga_cyclone5.dtsi"
+
+/ {
+ model = "EBV SOCrates";
+ compatible = "ebv,socrates", "altr,socfpga-cyclone5", "altr,socfpga";
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ };
+
+ memory {
+ name = "memory";
+ device_type = "memory";
+ reg = <0x0 0x40000000>; /* 1GB */
+ };
+};
+
+&gmac1 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+
+ rtc: rtc@68 {
+ compatible = "stm,m41t82";
+ reg = <0x68>;
+ };
+};
+
+&mmc {
+ status = "okay";
+};