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authorLinus Walleij <linus.walleij@linaro.org>2022-03-05 00:36:03 +0100
committerLinus Walleij <linus.walleij@linaro.org>2022-04-06 00:50:44 +0200
commit973a9ba5fe489bcb323cc4f4e9ece3959dd50686 (patch)
tree8f1d4f9ce46dc60792b11d108297c4cbe74567b3 /arch/arm/boot/dts/ste-ux500-samsung-skomer.dts
parentARM: dts: ux500: Add GPS to Janice device tree (diff)
downloadlinux-dev-973a9ba5fe489bcb323cc4f4e9ece3959dd50686.tar.xz
linux-dev-973a9ba5fe489bcb323cc4f4e9ece3959dd50686.zip
ARM: dts: ux500: Add GPS to Skomer device tree
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/ste-ux500-samsung-skomer.dts')
-rw-r--r--arch/arm/boot/dts/ste-ux500-samsung-skomer.dts31
1 files changed, 30 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/ste-ux500-samsung-skomer.dts b/arch/arm/boot/dts/ste-ux500-samsung-skomer.dts
index dcdec867f24d..81b341a5ae45 100644
--- a/arch/arm/boot/dts/ste-ux500-samsung-skomer.dts
+++ b/arch/arm/boot/dts/ste-ux500-samsung-skomer.dts
@@ -281,12 +281,27 @@
};
};
- /* GPF UART */
+ /* GPS UART */
uart@80121000 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&u1rxtx_a_1_default &u1ctsrts_a_1_default>;
pinctrl-1 = <&u1rxtx_a_1_sleep &u1ctsrts_a_1_sleep>;
+
+ gnss {
+ /* The CSRG05TA03-ICJE-R is a SirfStarV 5t chip */
+ compatible = "csr,csrg05ta03-icje-r";
+ /* GPS_RSTN on GPIO209 */
+ reset-gpios = <&gpio6 17 GPIO_ACTIVE_LOW>;
+ /* GPS_ON_OFF on GPIO86 */
+ sirf,onoff-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
+ /* GPS_1V8 (VSMPS2) */
+ vcc-supply = <&db8500_vsmps2_reg>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&g05ta03_skomer_default>;
+ /* According to /etc/sirfgps.conf */
+ current-speed = <460800>;
+ };
};
/* Debugging console UART connected to AB8505 USB */
@@ -653,6 +668,20 @@
};
};
};
+ g05ta03 {
+ g05ta03_skomer_default: g05ta03 {
+ /* Reset line, start out de-asserted */
+ skomer_cfg1 {
+ pins = "GPIO209_AG15";
+ ste,config = <&gpio_out_hi>;
+ };
+ /* GPS_ON_OFF, start out deasserted (off) */
+ skomer_cfg2 {
+ pins = "GPIO86_C6";
+ ste,config = <&gpio_out_lo>;
+ };
+ };
+ };
};
&ab8505_gpio {