diff options
| author |   Maxime COQUELIN <maxime.coquelin@st.com> | 2013-11-06 09:25:13 +0100 |
|---|---|---|
| committer |   Srinivas Kandagatla <srinivas.kandagatla@st.com> | 2013-12-04 08:59:55 +0000 |
| commit | f53e99a9b4f09fe39336547c7a6a9e1cb7a25907 (patch) | |
| tree | bcfc95cf63bad9f3d01714700d346b06a3f6abee /arch/arm/boot/dts/stih416.dtsi | |
| parent | ARM: STi: OF: Fix a typo in pincfg header (diff) | |
| download | linux-dev-f53e99a9b4f09fe39336547c7a6a9e1cb7a25907.tar.xz linux-dev-f53e99a9b4f09fe39336547c7a6a9e1cb7a25907.zip | |
ARM: STi: Supply I2C configuration to STiH416 SoC
This patch supplies I2C configuration to STiH416 SoC.
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stih416.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stih416.dtsi | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi index 1a0326ea7d07..b7ab47b95816 100644 --- a/arch/arm/boot/dts/stih416.dtsi +++ b/arch/arm/boot/dts/stih416.dtsi @@ -9,6 +9,7 @@ #include "stih41x.dtsi" #include "stih416-clock.dtsi" #include "stih416-pinctrl.dtsi" +#include <dt-bindings/interrupt-controller/arm-gic.h> / { L2: cache-controller { compatible = "arm,pl310-cache"; @@ -92,5 +93,57 @@ pinctrl-0 = <&pinctrl_sbc_serial1>; clocks = <&CLK_SYSIN>; }; + + i2c@fed40000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0xfed40000 0x110>; + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_S_ICN_REG_0>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0_default>; + + status = "disabled"; + }; + + i2c@fed41000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0xfed41000 0x110>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_S_ICN_REG_0>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_default>; + + status = "disabled"; + }; + + i2c@fe540000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0xfe540000 0x110>; + interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_SYSIN>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sbc_i2c0_default>; + + status = "disabled"; + }; + + i2c@fe541000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0xfe541000 0x110>; + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&CLK_SYSIN>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sbc_i2c1_default>; + + status = "disabled"; + }; }; }; |