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| author |   Arnd Bergmann <arnd@arndb.de> | 2017-02-07 16:09:41 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2017-02-07 16:09:41 +0100 |
| commit | 3c38e32aad9b4fe11d037118008d2245bc273454 (patch) | |
| tree | 8185e14b942cf014fd9e75307ae7817ca69cbf95 /arch/arm/boot/dts/sun8i-a23-a33.dtsi | |
| parent | Merge tag 'sunxi-dt-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt (diff) | |
| parent | ARM: dts: sun8i: sinlinx: Enable audio nodes (diff) | |
| download | linux-dev-3c38e32aad9b4fe11d037118008d2245bc273454.tar.xz linux-dev-3c38e32aad9b4fe11d037118008d2245bc273454.zip | |
Merge tag 'sunxi-dt-for-4.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT changes for 4.11, part 2" from Maxime Ripard:
Support for the audio codec and Mali GPU for the A33
* tag 'sunxi-dt-for-4.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: dts: sun8i: sinlinx: Enable audio nodes
ARM: dts: sun8i: parrot: Enable audio nodes
ARM: dts: sun8i: Add audio codec, dai and card for A33
ARM: sun8i: dt: Add mali node
dt-bindings: gpu: Add Mali Utgard bindings
Diffstat (limited to 'arch/arm/boot/dts/sun8i-a23-a33.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun8i-a23-a33.dtsi | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index 9f9bc2c5ac97..a952cc0703cc 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -472,6 +472,32 @@ #size-cells = <0>; }; + mali: gpu@1c40000 { + compatible = "allwinner,sun8i-a23-mali", + "allwinner,sun7i-a20-mali", "arm,mali-400"; + reg = <0x01c40000 0x10000>; + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "gp", + "gpmmu", + "pp0", + "ppmmu0", + "pp1", + "ppmmu1", + "pmu"; + clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; + clock-names = "bus", "core"; + resets = <&ccu RST_BUS_GPU>; + + assigned-clocks = <&ccu CLK_GPU>; + assigned-clock-rates = <408000000>; + }; + gic: interrupt-controller@01c81000 { compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; reg = <0x01c81000 0x1000>, |