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| author |   Paul Kocialkowski <paul.kocialkowski@bootlin.com> | 2018-12-05 10:24:30 +0100 |
|---|---|---|
| committer |   Maxime Ripard <maxime.ripard@bootlin.com> | 2018-12-05 11:50:05 +0100 |
| commit | 925c5afd78c40169c7e0e6adec52d5119ff43751 (patch) | |
| tree | f329e2eb9fa4e9eb1eb3fbedd4e51d933b8b2867 /arch/arm/boot/dts/sun8i-h3.dtsi | |
| parent | ARM: dts: sun8i: Add the H3/H5 CSI controller (diff) | |
| download | linux-dev-925c5afd78c40169c7e0e6adec52d5119ff43751.tar.xz linux-dev-925c5afd78c40169c7e0e6adec52d5119ff43751.zip | |
ARM: dts: sun8i: h3: Fix the system-control register range
Unlike in previous generations, the system-control register range is not
limited to a size of 0x30 on the H3. In particular, the EMAC clock
configuration register (accessed through syscon) is at offset 0x30 in
that range.
Extend the register size to its full range (0x1000) as a result.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/sun8i-h3.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun8i-h3.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 3ecfabb10151..45242df7425b 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -136,7 +136,7 @@ soc { system-control@1c00000 { compatible = "allwinner,sun8i-h3-system-control"; - reg = <0x01c00000 0x30>; + reg = <0x01c00000 0x1000>; #address-cells = <1>; #size-cells = <1>; ranges; |