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| author |   Andre Przywara <andre.przywara@arm.com> | 2019-11-21 01:18:34 +0000 |
|---|---|---|
| committer |   Maxime Ripard <maxime@cerno.tech> | 2019-12-10 10:43:35 +0100 |
| commit | c35a516a46187c8eeb7a56c64505ec6f7e22a0c7 (patch) | |
| tree | 8241f1206e20f675c9cd675057a73e2ca422e012 /arch/arm/boot/dts/sun8i-h3.dtsi | |
| parent | arm64: dts: allwinner: H6: Add PMU mode (diff) | |
| download | linux-dev-c35a516a46187c8eeb7a56c64505ec6f7e22a0c7.tar.xz linux-dev-c35a516a46187c8eeb7a56c64505ec6f7e22a0c7.zip | |
arm64: dts: allwinner: H5: Add PMU node
Add the Performance Monitoring Unit (PMU) device tree node to the H5
.dtsi, which tells DT users which interrupts are triggered by PMU
overflow events on each core.
As with the A64, the interrupt numbers from the manual were wrong (off
by 4), the actual SPI IDs have been gathered in U-Boot, and were
verified with perf in Linux.
Tested with perf record and taskset on an OrangePi PC2.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'arch/arm/boot/dts/sun8i-h3.dtsi')
0 files changed, 0 insertions, 0 deletions