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authorPaul Kocialkowski <contact@paulk.fr>2020-10-31 19:21:31 +0100
committerMaxime Ripard <maxime@cerno.tech>2020-11-02 11:08:23 +0100
commit52a70e641a1fe6b0dc3ff46a8498d778ce6b99de (patch)
treef430511f97a2b02f3dc64151f2a776518fc92a5f /arch/arm/boot/dts/sun8i-v3s.dtsi
parentARM: dts: sun8i: V3/S3: Add UART1 pin definitions to the V3/S3 dtsi (diff)
downloadlinux-dev-52a70e641a1fe6b0dc3ff46a8498d778ce6b99de.tar.xz
linux-dev-52a70e641a1fe6b0dc3ff46a8498d778ce6b99de.zip
ARM: dts: sun8i-v3s: Add I2C1 PB pins description
I2C1 can be exposed through PB pins in addition to PE pins on the V3s. Add the device-tree description for these pins. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20201031182137.1879521-4-contact@paulk.fr
Diffstat (limited to 'arch/arm/boot/dts/sun8i-v3s.dtsi')
-rw-r--r--arch/arm/boot/dts/sun8i-v3s.dtsi6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 0c7341676921..7b2d684aeb97 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -348,6 +348,12 @@
};
/omit-if-no-ref/
+ i2c1_pb_pins: i2c1-pb-pins {
+ pins = "PB8", "PB9";
+ function = "i2c1";
+ };
+
+ /omit-if-no-ref/
i2c1_pe_pins: i2c1-pe-pins {
pins = "PE21", "PE22";
function = "i2c1";