diff options
| author |   Paul Kocialkowski <paul.kocialkowski@bootlin.com> | 2022-02-05 19:53:24 +0100 |
|---|---|---|
| committer |   Maxime Ripard <maxime@cerno.tech> | 2022-02-07 10:02:26 +0100 |
| commit | c4af51698c4fb4fc683f2ac67f482cdf9ba2cd13 (patch) | |
| tree | bb7ca3b5ba7ada18607ad0f66262c3afa0fd2186 /arch/arm/boot/dts/sun8i-v3s.dtsi | |
| parent | ARM: dts: sun8i: Add ethernet0 alias in Nanopi NEO's device tree (diff) | |
| download | linux-dev-c4af51698c4fb4fc683f2ac67f482cdf9ba2cd13.tar.xz linux-dev-c4af51698c4fb4fc683f2ac67f482cdf9ba2cd13.zip | |
ARM: dts: sun8i: v3s: Move the csi1 block to follow address order
The csi1 block node was mistakenly added before the gic node, although
its address comes after the gic's. Move the node to its correct
position.
Fixes: 90e048101fa1 ("ARM: dts: sun8i: V3/V3s/S3/S3L: add CSI1 device node")
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20220205185429.2278860-2-paul.kocialkowski@bootlin.com
Diffstat (limited to 'arch/arm/boot/dts/sun8i-v3s.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun8i-v3s.dtsi | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index b30bc1a25ebb..084323d5c61c 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -593,6 +593,17 @@ #size-cells = <0>; }; + gic: interrupt-controller@1c81000 { + compatible = "arm,gic-400"; + reg = <0x01c81000 0x1000>, + <0x01c82000 0x2000>, + <0x01c84000 0x2000>, + <0x01c86000 0x2000>; + interrupt-controller; + #interrupt-cells = <3>; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + }; + csi1: camera@1cb4000 { compatible = "allwinner,sun8i-v3s-csi"; reg = <0x01cb4000 0x3000>; @@ -604,16 +615,5 @@ resets = <&ccu RST_BUS_CSI>; status = "disabled"; }; - - gic: interrupt-controller@1c81000 { - compatible = "arm,gic-400"; - reg = <0x01c81000 0x1000>, - <0x01c82000 0x2000>, - <0x01c84000 0x2000>, - <0x01c86000 0x2000>; - interrupt-controller; - #interrupt-cells = <3>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; - }; }; }; |